1. Field of the Invention
The present invention relates to a semiconductor device having a fuse layer, and, more specifically, to a semiconductor device having a fuse layer in which an insulating layer positioned on the fuse layer is about 1 .mu.m in thickness.
2. Description of the Background Art
A redundancy circuit provided for repairing defects of a semiconductor device has been known. Generally, a fuse layer is formed together with the redundancy circuit, and the fuse layer is disconnected appropriately so as to replace a defective circuit with a redundant circuit.
FIG. 10 shows a specific structure of a DRAM (Dynamic Random Access Memory) as an example of a semiconductor device having a redundancy circuit. Referring to FIG. 10, a plurality of word lines WL extends in a row direction from respective row decoders 21 with word driver 22 interposed, in a memory cell array 20. A plurality of bit lines BL extend in a column direction from respective column decoders 23. Word lines WL and bit lines BL are arranged to cross each other. A memory cell MC is provided at each crossing point.
Outside the word lines WL, there is a spare word line SWL extending in the row direction from a spare decoder 24 with a spare word driver 25 interposed. At crossing points between spare word line SWL and the bit lines BL, spare memory cells SMC are provided.
Spare word line SWL, spare decoder 24 and spare word driver 25 constitute a so called redundancy circuit. A defective address comparing circuit 26 is connected to spare decoder 24, and a fuse layer is formed in defective address comparing circuit 26. The redundancy circuit is controlled by the fuse layer. A row address is input to defective address comparing circuit 26. FIG. 11 is a cross section showing the fuse layer portion and its periphery of the DRAM having such a structure. In FIG. 11, conductive layers other than the fuse layer 2 are not shown for the convenience of description.
Referring to FIG. 11, a fuse layer 2 is formed on a main surface of a semiconductor substrate 1 with an interlayer insulating layer 3a interposed. An insulating layer 3b of a silicon oxide, for example, is formed to cover fuse layer 2.
A defective circuit is repaired by appropriately disconnecting the above described fuse layer 2. Generally, laser is used to disconnect fuse layer 2. The principle of disconnecting fuse layer 2 by laser will be described.
Again referring to FIG. 11, fuse layer 2 is irradiated with laser 8. Consequently, laser is absorbed in fuse layer 2, and fuse layer 2 evaporates.
Consequently, insulating layer 3b is pushed up by the evaporating pressure of fuse layer 2 as shown in FIG. 12. When the evaporating pressure of fuse layer 2 attains to a prescribed value or higher, a crack 9 is generated in insulating layer 3b, as shown in FIG. 12. As the evaporating pressure generated by the evaporation of fuse layer 2 is further acts on the insulating layer 3b, insulating layer 3b positioned on fuse layer 2 is blown off, as shown in FIG. 13. Fuse layer 2 is disconnected through these steps.
As semiconductor devices has been miniaturized recently, planar width of the above described fuse layer 2 tends to be reduced. Therefore, there arises a problem that stable blowing of fuse layer 2 becomes difficult if the thickness t of insulating layer 3b on fuse layer 2 is as thick as about 1 .mu.m.
In view of the foregoing, U.S. Pat. No. 4,853,758 discloses a method for facilitating blowing of fuse layer 2. According to U.S. Pat. No. 4,853,758, there is formed a recess portion at the surface of insulating layer 3b immediately on fuse layer 2, so as to reduce thickness of insulating layer 3b immediately above the fuse layer 2. This allows stable blowing of fuse layer 2.
However, in order to form such a recess as described above at the surface of insulating layer 3b, a new process step such as selective etching of insulating layer 3b becomes necessary. This makes manufacturing process complicated, resulting in increased manufacturing cost.
Alternatively, when the thickness of insulating layer 3b on fuse layer 2 is as thick as 1 .mu.m or more, a method may be possible in which energy of the laser with which the fuse layer 2 is irradiated is increased. However, if the laser energy is set larger, there may possibly be a damage to the semiconductor substrate, for example underlying the fuse layer 2.